Panasonic FP7 Series - DIVFP2 (Division (FP2 Compatible))

6.7 DIVFP2 (Division (FP2 Compatible))
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Ladder diagram
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Available operation units (●: Available)
Operatio
n unit
bit US SS UL SL SF DF
i ● ● ● ●
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List of operands
Operand Description
S1 Calculation target data 1 (device address or constant)
S2 Calculation target data 2 (device address or constant)
D Calculation result data (device address)
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Available devices (●: Available)
Operan
d
16-Bit device:
32-Bit
device:
(Note 1)
Integer
Real
numbe
r
St
rin
g
Index
modifie
r
(Note 2)
W
X
W
Y
W
R
W
L
W
S
S
D
D
T
L
D
U
M
WI
W
O
TS
C
S
TE
C
E
IX
(N
ote
3)
K
(N
ote
4)
Ｕ
(N
ote
5)
H
(N
ote
6)
SF
D
F
" "
S1 ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ●
S2 ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ●
D ● ● ● ● ● ● ● ● ● ● ● ●
(Note 1) Cannot be specified when the operation unit is 16-bit integer (SS, US).
(Note 2) Only 16-bit devices, 32-bit devices, and integer constants can be modified. (Real number constants,
and character constants cannot be specified.)
(Note 3) Index register (I0 to IE)
(Note 4) Can be specified only when the operation unit is signed integer (SS, SL).
(Note 5) Can be specified only when the operation unit is unsigned integer (US, UL).
(Note 6) Can be specified only when the operation unit is integer (US, SS, UL, SL).
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Outline of operation
● This instruction divides [S1] by the value of [S2], and stores the quotient in [D] and the
remainder in the system data register (SD).
6.7 DIVFP2 (Division (FP2 Compatible))
WUME-FP7CPUPGR-12 6-15