Panasonic FP7 Series - FIFR (Data Read (First-In-First-Out))

8.18 FIFR (Data Read (First-In-First-Out))
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Ladder diagram
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Available operation units (●: Available)
Operatio
n unit
bit US SS UL SL SF DF
i ● ●
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List of operands
Operand Description
S Starting device address of the data buffer
D Device address of the read data
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Available devices (●: Available)
Operan
d
16-Bit device:
32-Bit
device:
Integer
Real
numbe
r
St
rin
g
Index
modifie
r
(Note 1)
W
X
W
Y
W
R
W
L
W
S
S
D
D
T
L
D
U
M
WI
W
O
TS
C
S
TE
C
E
IX
(N
ote
2)
K Ｕ H SF
D
F
" "
S ● ● ●
D ● ● ● ● ● ● ● ● ●
(Note 1) Only 16-bit devices and integer constants can be modified.
(Note 2) Index register (I0 to IE)
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Outline of operation
● This instruction reads data from FIFO buffer specified by [S], and sets it to [D].
(In the [S] buffer area, it is necessary to define buffer first using the DEFBUF instruction.)
● Pre-execution buffer consistency check (An operation error occurs in the following cases)
1. [S] (buffer size) > 4096, or [S] (buffer size) = 0
2. [S]+1 (stored data amount) = 0
3. [S]+1 (stored data amount) > [S] (buffer size)
4. [S]+2 (read pointer) > [S] (buffer size)
5. Buffer area exceeds the upper limit of the specified device
8.18 FIFR (Data Read (First-In-First-Out))
WUME-FP7CPUPGR-12 8-37