Schweitzer Engineering Laboratories SEL-421-4 - Loss-Of-Potential Logic

5.28
SEL-421 Relay Instruction Manual Date Code 20171021
Protection Functions
Loss-of-Potential Logic
Loss-of-Potential Logic
Fuses or molded case circuit breakers often protect the secondary windings of the
power system potential transformers. Operation of one or more fuses or molded
case circuit breakers results in a loss of polarizing potential inputs to the relay.
Loss of one or more phase voltages prevents the relay from discriminating fault
distance and direction properly.
An occasional loss-of-potential (LOP) at the secondary inputs of a distance relay
is unavoidable but detectable. The relay detects a loss-of-potential condition and
asserts Relay Word bits LOP (loss-of-potential detected) and ILOP (Internal loss-
of-protection from ELOP setting). This allows you to block distance element
operation, block or enable forward-looking directional overcurrent elements, and
issue an alarm for any true LOP condition.
If line-side PTs are used, the circuit breaker(s) must be closed for the LOP logic
to detect a three-phase LOP condition. Therefore, if three-phase potential to the
relay is lost while the circuit breaker(s) is open (e.g., the PT fuses are removed
while the line is de-energized), the relay cannot detect an LOP when the circuit
breaker(s) closes again.
The SEL-421 also asserts LOP upon circuit breaker closing for one or two miss-
ing PTs. If the relay detects a voltage unbalance with balanced currents at circuit
breaker close, then the relay declares a loss-of-potential condition.
Inputs into the LOP logic are as follows:
➤ 3PO—three-pole open condition
➤ SPO—single-pole open condition
➤ OOSDET—out-of-step condition detected
➤ OST—out-of-step tripping assertion
➤ V
1
—positive-sequence voltage (V secondary)
➤ I
1
—positive-sequence current (A secondary)
➤ V
0
—zero-sequence voltage (V secondary)
➤ I
0
—zero-sequence current (A secondary)
All three poles of the circuit breaker(s) must be closed (i.e., Relay Word bit 3PO
equals logical 0) and neither Relay Word bit OSB nor OST can be asserted for the
LOP logic to operate.
The relay declares an LOP condition (Relay Word bit LOP equals logical 1) if V
1
drops in magnitude by at least ten percent and there is no corresponding change
in I
1
or I
0
magnitude or angle. An LOP condition persisting for 15 cycles causes
the LOP logic to latch. LOP resets (Relay Word bit LOP equals logical 0) when
V
1
returns to a level greater than 85 percent nominal voltage and V
0
is less than
1
0
percent of V
1
.
The LOP logic requires no settings other than enable setting ELOP.
Setting ELOP := N
If you set ELOP to N, the LOP logic operates but does not disable any voltage-
polarized elements. This option is for indication only.