Schweitzer Engineering Laboratories SEL-421-4 - Page 19

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Date Code 20171021 Instruction Manual SEL-421 Relay
List of Figures
Figure 5.92 DCB Logic Diagram................................................................................................................5.124
Figure 5.93 Permissive Trip Receiver Logic Diagram ...............................................................................5.129
Figure 5.94 POTT Logic Diagram..............................................................................................................5.130
Figure 5.95 POTT Cross-Country Logic Diagram .....................................................................................5.131
Figure 5.96 POTT Scheme Logic (ECOMM := POTT3) With Echo and Weak Infeed.............................5.132
Figure 5.97 Permissive Trip Received Logic Diagram...............................................................................5.135
Figure 5.98 DCUB Logic Diagram.............................................................................................................5.136
Figure 5.99 Trip Logic Diagram.................................................................................................................5.142
Figure 5.100 Two Circuit Breakers Trip Logic Diagram .............................................................................5.145
Figure 5.101 Trip A Unlatch Logic ..............................................................................................................5.146
Figure 5.102 Trip During Open Pole ............................................................................................................5.146
Figure 5.103 Scheme 1 Logic Diagram ........................................................................................................5.147
Figure 5.104 Scheme Y1 Circuit Breaker Failure Logic ..............................................................................5.148
Figure 5.105 Scheme 2 Three-Pole Circuit Breaker Failure Protection Logic.............................................5.149
Figure 5.106 Scheme Y2 Three-Pole Circuit Breaker Failure Logic............................................................5.149
Figure 5.107 Scheme 2 Single-Pole Circuit Breaker Failure Protection Logic ............................................5.150
Figure 5.108 Scheme Y2 Single-Pole Circuit Breaker Failure Protection Logic .........................................5.150
Figure 5.109 Scheme 2 Current-Supervised Three-Pole Retrip Logic .........................................................5.151
Figure 5.110 Scheme Y2 Current-Supervised Three-Pole Retrip Logic ......................................................5.151
Figure 5.111 Scheme 2 Current-Supervised Single-Pole Retrip Logic ........................................................5.151
Figure 5.112 Scheme Y2 Current-Supervised Single-Pole Retrip Logic .....................................................5.152
Figure 5.113 No Current/Residual Current Circuit Breaker Failure Protection Logic Diagram..................5.152
Figure 5.114 Circuit Breaker Failure Seal-In Logic Diagram ......................................................................5.156
Figure 5.115 Failure to Interrupt Load Current Logic Diagram ...................................................................5.157
Figure 5.116 Flashover Protection Logic Diagram.......................................................................................5.157
Figure 5.117 Circuit Breaker Failure Trip Logic Diagram...........................................................................5.157
Figure 5.118 Partial Breaker-and-a-Half or Partial Ring-Bus Breaker Arrangement...................................5.158
Figure 5.119 Synchronism-Check Voltages for Two Circuit Breakers........................................................5.159
Figure 5.120 Synchronism-Check Settings...................................................................................................5.160
Figure 5.121 Synchronism-Check Relay Word Bits.....................................................................................5.161
Figure 5.122 Example Synchronism-Check Voltage Connections to the SEL-421 .....................................5.163
Figure 5.123 Synchronism-Check Voltage Reference..................................................................................5.164
Figure 5.124 Normalized Synchronism-Check Voltage Sources VS1 and VS2 ..........................................5.165
Figure 5.125 Healthy Voltage Window and Indication ................................................................................5.166
Figure 5.126 Synchronism-Check Voltage Difference Logic.......................................................................5.166
Figure 5.127 Synchronism-Check Enable Logic ..........................................................................................5.168
Figure 5.128 “No Slip” System Synchronism-Check Element Output Response ........................................5.170
Figure 5.129 “Slip—No Compensation” Synchronism-Check Element Output Response..........................5.171
Figure 5.130 “Slip—With Compensation” Synchronism-Check Element Output Response.......................5.173
Figure 5.131 Alternative Synchronism-Check Source 2 Example and Settings...........................................5.175
Figure 6.1 230 kV Overhead Transmission Line..........................................................................................6.1
Figure 6.2 Circuit Breaker Arrangement at Station S...................................................................................6.3
Figure 6.3 500 kV Parallel Overhead Transmission Lines .........................................................................6.19
Figure 6.4 Circuit Breaker-and-a-Half Arrangement: Station S, Line 1.....................................................6.22
Figure 6.5 Quadrilateral Ground-Distance Element Reactive Reach Setting.............................................6.28
Figure 6.6 Definition of Homogeneous Network .......................................................................................6.30
Figure 6.7 Tilt in Apparent Fault Impedance Resulting From Nonhomogeneity.......................................6.31
Figure 6.8 Nonhomogeneous Angle Setting ...............................................................................................6.32
Figure 6.9 Current Distribution During Cross-Country Fault.....................................................................6.44
Figure 6.10 Simplified POTT Scheme KEY1/KEY3 Logic.........................................................................6.45
Figure 6.11 345 kV Tapped Overhead Transmission Line...........................................................................6.54
Figure 6.12 Circuit Breaker Arrangement at Station S.................................................................................6.57
Figure 6.13 Reverse Zone 3 Coordination ....................................................................................................6.62
Figure 6.14 Impedance Diagram...................................................................................................................6.63
Figure 6.15 Load-Encroachment Function ...................................................................................................6.67
Figure 6.16 345 kV Tapped Line Negative-Sequence Network ...................................................................6.73