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Schweitzer Engineering Laboratories SEL-421-4 - Page 8

Schweitzer Engineering Laboratories SEL-421-4
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SEL-421 Relay Instruction Manual Date Code 20171021
List of Tables
Table 5.33 Ground Directional Element Settings AUTO Calculations.......................................................5.35
Table 5.34 Ground Directional Element Preferred Settings........................................................................5.35
Table 5.35 Ground Directional Element Enables ........................................................................................5.37
Table 5.36 Ground Directional Element Relay Word Bits..........................................................................5.39
Table 5.37 Reference Table for Figure 5.23, Figure 5.24, and Figure 5.25................................................5.42
Table 5.38 Vector Definitions for Equation 1.1 Through Equation 1.11 ....................................................5.43
Table 5.39 Phase and Negative-Sequence Directional Elements Relay Word Bits ....................................5.45
Table 5.40 Zone Directional Settings ..........................................................................................................5.47
Table 5.41 CVT Transient Detection Logic Setting....................................................................................5.47
Table 5.42 CVT Transient Detection Logic Relay Word Bit......................................................................5.48
Table 5.43 Series-Compensation Line Logic Relay Settings ......................................................................5.49
Table 5.44 Load-Encroachment Logic Relay Settings ................................................................................5.50
Table 5.45 Load-Encroachment Logic Relay Word Bits ............................................................................5.50
Table 5.46 OOS Logic Relay Settings.........................................................................................................5.52
Table 5.47 OOS Logic Relay Word Bits .....................................................................................................5.53
Table 5.48 Input/Output Combinations of the Pole-Open OOS Blocking Logic........................................5.67
Table 5.49 Mho Ground-Distance Elements Relay Word Bits ...................................................................5.73
Table 5.50 Differences Between the Adaptive Right Resistance Blinder and the Existing Resistance
Blinder ......................................................................................................................................5.77
Table 5.51 Quadrilateral Ground-Distance Elements Relay Word Bits......................................................5.77
Table 5.52 Mho Phase-Distance Elements Relay Word Bits ......................................................................5.81
Table 5.53 High-Speed and Conventional Element Directional Setting Summary.....................................5.85
Table 5.54 Quadrilateral Phase-Distance Elements Relay Word Bits.........................................................5.89
Table 5.55 Phase Overcurrent Element Settings .........................................................................................5.94
Table 5.56 Negative-Sequence Overcurrent Element Settings....................................................................5.94
Table 5.57 Residual Ground Overcurrent Element Settings .......................................................................5.95
Table 5.58 Phase Instantaneous/Definite-Time Line Overcurrent Relay Word Bits...........................................5.95
Table 5.59 Negative-Sequence Instantaneous/Definite-Time Line Overcurrent Relay Word Bits.............5.95
Table 5.60 Residual Ground Instantaneous/Definite-Time Line Overcurrent Relay Word Bits.................5.96
Table 5.61 Selectable Current Quantities ..................................................................................................5.100
Table 5.62 Selectable Inverse-Time Overcurrent Settings ........................................................................5.100
Table 5.63 Selectable Inverse-Time Overcurrent Relay Word Bits ..........................................................5.101
Table 5.64 Equations Associated With U.S. Curves .................................................................................5.101
Table 5.65 Equations Associated With IEC Curves ..................................................................................5.102
Table 5.66 Available Input Quantities.......................................................................................................5.114
Table 5.67 SOTF Settings..........................................................................................................................5.118
Table 5.68 SOTF Relay Word Bits............................................................................................................5.118
Table 5.69 ECOMM Setting......................................................................................................................5.120
Table 5.70 DCB Settings ...........................................................................................................................5.123
Table 5.71 DCB Relay Word Bits .............................................................................................................5.123
Table 5.72 POTT Settings .........................................................................................................................5.127
Table 5.73 POTT Relay Word Bits ...........................................................................................................5.128
Table 5.74 DCUB Settings ........................................................................................................................5.134
Table 5.75 DCUB Relay Word Bits ..........................................................................................................5.135
Table 5.76 Additional Settings for Single Pole Tripping (SPT)................................................................5.137
Table 5.77 Setting TULO Unlatch Trip Options .......................................................................................5.139
Table 5.78 Trip Logic Settings ..................................................................................................................5.140
Table 5.79 Trip Logic Relay Word Bits ....................................................................................................5.144
Table 5.80 Circuit Breaker Failure Relay Word Bits ................................................................................5.155
Table 5.81 Synchronism-Check Relay Word Bits.....................................................................................5.161
Table 6.1 System Data—230 kV Overhead Transmission Line..................................................................6.2
Table 6.2 Secondary Impedances ................................................................................................................6.2
Table 6.3 LOP Enable Options....................................................................................................................6.6
Table 6.4 Options for Enabling Pole-Open Logic .....................................................................................6.12
Table 6.5 Setting TULO Unlatch Trip Options ........................................................................................
.6.14
Table 6.6 Settings for 230 kV Overhead TX Example..............................................................................6.15
Table 6.7 System Data—500 kV Parallel Overhead Transmission Lines.................................................6.19
Table 6.8 Secondary Impedances ..............................................................................................................6.20

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