GD32VF103 User Manual
500
This field reports the remaining time of current frame in terms of PHY clocks.
This field reports the frame number of current frame and returns to 0 after it reaches
0x3FFF.
Host periodic transmit FIFO/queue status register (USBFS_HPTFQSTAT)
Address offset: 0x0410
Reset value: 0x0008 0200
This register reports the current status of the host periodic Tx FIFO and request queue. The
request queue holds IN, OUT or other request entries in host mode.
This register has to be accessed by word (32-bit)
Top entry of the periodic Tx request queue