Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 34

34 Datasheet
5-31 Transitions Due to Power Failure ..........................................................................171
5-32 Supported Deep S4/S5 Policy Configurations..........................................................171
5-33 Deep S4/S5 Wake Events....................................................................................172
5-34 Transitions Due to Power Button ..........................................................................173
5-35 Transitions Due to RI# Signal ..............................................................................174
5-36 Write Only Registers with Read Paths in ALT Access Mode........................................176
5-37 PIC Reserved Bits Return Values ..........................................................................178
5-38 Register Write Accesses in ALT Access Mode ..........................................................178
5-39 Causes of Host and Global Resets.........................................................................181
5-40 Event Transitions that Cause Messages .................................................................184
5-41 Multi-activity LED message type...........................................................................198
5-42 Legacy Replacement Routing ...............................................................................201
5-43 Debug Port Behavior...........................................................................................208
5-44 I
2
C Block Read...................................................................................................218
5-45 Enable for SMBALERT# .......................................................................................220
5-46 Enables for SMBus Slave Write and SMBus Host Events...........................................221
5-47 Enables for the Host Notify Command...................................................................221
5-48 Slave Write Registers..........................................................................................223
5-49 Command Types ................................................................................................223
5-50 Slave Read Cycle Format.....................................................................................224
5-51 Data Values for Slave Read Registers....................................................................225
5-52 Host Notify Format.............................................................................................227
5-53 I
2
C Write Commands to the Intel ME ....................................................................231
5-54 Block Read Command – Byte Definition.................................................................232
5-55 Region Size versus Erase Granularity of Flash Components......................................244
5-56 Region Access Control Table ................................................................................246
5-57 Hardware Sequencing Commands and Opcode Requirements...................................249
5-58 Flash Protection Mechanism Summary ..................................................................251
5-59 Recommended Pinout for 8-Pin Serial Flash Device .................................................252
5-60 Recommended Pinout for 16-Pin Serial Flash Device ...............................................252
5-59 PCH supported Audio formats over HDMI and DisplayPort* ......................................260
5-60 PCH Digital Port Pin Mapping................................................................................262
5-61 Display Co-Existence Table..................................................................................263
6-1 Desktop PCH Ballout By Signal Name....................................................................272
6-2 Mobile PCH Ballout By Signal Name ......................................................................284
8-1 Storage Conditions.............................................................................................297
8-2 Mobile Thermal Design Power ..............................................................................298
8-3 PCH Absolute Maximum Ratings...........................................................................298
8-4 PCH Power Supply Range ....................................................................................299
8-5 Measured I
CC
(Desktop Only)...............................................................................299
8-6 Measured I
CC
(Mobile Only) .................................................................................300
8-7 DC Characteristic Input Signal Association.............................................................302
8-8 DC Input Characteristics .....................................................................................304
8-9 DC Characteristic Output Signal Association...........................................................307
8-10 DC Output Characteristics ...................................................................................309
8-11 Other DC Characteristics.....................................................................................311
8-12 Signal Groups....................................................................................................312
8-13 CRT DAC Signal Group DC Characteristics: Functional Operating Range
(VccADAC = 3.3 V ±5%).....................................................................................312
8-14 LVDS Interface: Functional Operating Range (VccALVDS = 1.8 V ±5%).....................313
8-15 Display Port Auxiliary Signal Group DC Characteristics.............................................313
8-16 PCI Express* Interface Timings............................................................................314
8-17 HDMI Interface Timings (DDP[D:B][3:0])Timings ...................................................315
8-18 SDVO Interface Timings......................................................................................315
8-19 DisplayPort Interface Timings (DDP[D:B][3:0])......................................................316
8-20 DisplayPort Aux Interface....................................................................................317
8-21 DDC Characteristics............................................................................................317
8-22 LVDS Interface AC characteristics at Various Frequencies ........................................318
8-23 CRT DAC AC Characteristics.................................................................................320
8-24 Clock Timings....................................................................................................320
8-25 PCI Interface Timing...........................................................................................324
8-26 Universal Serial Bus Timing .................................................................................325
8-27 SATA Interface Timings.......................................................................................326
8-28 SMBus and SMLink Timing...................................................................................327
8-29 Intel
®
High Definition Audio Timing ......................................................................328
8-30 LPC Timing........................................................................................................328
8-31 Miscellaneous Timings.........................................................................................328