Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 413

Datasheet 413
Chipset Configuration Registers
10.1.83 CIR24—Chipset Initialization Register 24
Offset Address: 3A28–3A2Bh Attribute: R/W
Default Value: 00000000h Size: 32-bit
10.1.84 CIR25—Chipset Initialization Register 25
Offset Address: 3A2C–3A2Fh Attribute: R/W
Default Value: 00000000h Size: 32-bit
10.1.85 CIR26—Chipset Initialization Register 26
Offset Address: 3A6C–3A6Fh Attribute: R/W
Default Value: 00000000h Size: 32-bit
10.1.86 CIR27—Chipset Initialization Register 27
Offset Address: 3A80–3A83h Attribute: R/W
2
RMH 1 Upstream Wake on OC Disable This bit governs the hub behavior when
globally suspended and the system is in Sx.
0 = Enables the port to be sensitive to over-current conditions as system wake-up
events. That is, the hub will initiate a resume on its upstream port and cause a
wake from Sx when an OC condition occurs on an enabled DS port
1 = Over-current event does not initiate a wake upstream and does not cause a wake
from Sx
1
RMH 1 Upstream Wake on Disconnect Disable This bit governs the hub behavior
when globally suspended and the system is in Sx
0 = Enables disconnect events on downstream port to be treated as resume events
to be propagated upstream. In this case, it is allowed to initiate a wake on its
upstream port and cause a system wake from Sx in response to a disconnect
event on a downstream port
1 = Downstream disconnect events do not initiate a resume on its upstream port or
cause a resume from Sx.
0
RMH 1 Upstream Wake on Connect Enable This bit governs the hub behavior
when globally suspended and the system is in Sx.
0 = Enables connect events on a downstream port to be treated as resume events to
be propagated upstream. As well as waking up the system from Sx.
1 = Downstream connect events do not wake the system from Sx nor does it initiate
a resume on its upstream port.
Bit Description
Bit Description
31:0 CIR24 Field 1 — R/W. BIOS must program this field to 01010000h.
Bit Description
31:0 CIR25 Field 1 — R/W. BIOS must program this field to 01010404h.
Bit Description
31:0 CIR26 Field 1 — R/W. BIOS must program this field to 00000001h.