EasyManua.ls Logo

Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 412

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
936 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Chipset Configuration Registers
412 Datasheet
10.1.82 RMHWKCTL—Rate Matching Hub Wake Control Register
Offset Address: 35B0–35B3h Attribute: R/W
Default Value: 00000000h Size: 32-bit
All bits in this register are in the Resume Well and is only cleared by RSMRST#.
Bit Description
31:10 Reserved
9
RMH 2 Inherit EHCI2 Wake Control Settings: When this bit is set, the RMH
behaves as if bits 6:4 of this register reflect the appropriate bits of EHCI PORTSC0
bits 22:20.
8
RMH 1 Inherit EHCI1 Wake Control Settings: When this bit is set, the RMH
behaves as if bits 2:0 of this register reflect the appropriate bits of EHCI PORTSC0
bits 22:20.
7
RMH 2 Upstream Wake on Device Resume This bit governs the hub behavior
when globally suspended and the system is in Sx.
0 = Enables the port to be sensitive to device initiated resume events as system
wake-up events; that is, the hub will initiate a resume on its upstream port and
cause a wake from Sx when a device resume occurs on an enabled DS port
1 = Device resume event is seen on a downstream port, the hub does not initiate a
wake upstream and does not cause a wake from Sx
6
RMH 2 Upstream Wake on OC Disable This bit governs the hub behavior when
globally suspended and the system is in Sx.
0 = Enables the port to be sensitive to over-current conditions as system wake-up
events; that is, the hub will initiate a resume on its upstream port and cause a
wake from Sx when an OC condition occurs on an enabled DS port
1 = Over-current event does not initiate a wake upstream and does not cause a wake
from Sx
5
RMH 2 Upstream Wake on Disconnect Disable This bit governs the hub behavior
when globally suspended and the system is in Sx
0 = Enables disconnect events on downstream port to be treated as resume events
to be propagated upstream. In this case, it is allowed to initiate a wake on its
upstream port and cause a system wake from Sx in response to a disconnect
event on a downstream port
1 = Downstream disconnect events do not initiate a resume on its upstream port or
cause a resume from Sx.
4
RMH 2 Upstream Wake on Connect Enable This bit governs the hub behavior
when globally suspended and the system is in Sx.
0 = Enables connect events on a downstream port to be treated as resume events to
be propagated upstream. As well as waking up the system from Sx.
1 = Downstream connect events do not wake the system from Sx nor does it initiate
a resume on its upstream port.
3
RMH 1 Upstream Wake on Device Resume This bit governs the hub behavior
when globally suspended and the system is in Sx.
0 = Enables the port to be sensitive to device initiated resume events as system
wake-up events; that is, the hub will initiate a resume on its upstream port and
cause a wake from Sx when a device resume occurs on an enabled DS port
1 = Device resume event is seen on a downstream port, the hub does not initiate a
wake upstream and does not cause a wake from Sx

Table of Contents

Related product manuals