Datasheet 417
PCI-to-PCI Bridge Registers (D30:F0)
11.1.4 PSTS—PCI Status Register (PCI-PCI—D30:F0)
Offset Address: 06h–07h Attribute: R/WC, RO
Default Value: 0010h Size: 16 bits
Note: For the writable bits, software must write a 1 to clear bits that are set. Writing a 0 to
the bit has no effect.
1
Memory Space Enable (MSE) — R/W. Controls the response as a target for memory
cycles targeting PCI.
0 = Disable
1 = Enable
0
I/O Space Enable (IOSE) — R/W. Controls the response as a target for I/O cycles
targeting PCI.
0 = Disable
1 = Enable
Bit Description
Bit Description
15
Detected Parity Error (DPE) — R/WC.
0 = Parity error Not detected.
1 = Indicates that the PCH detected a parity error on the internal backbone. This bit gets
set even if the Parity Error Response bit (D30:F0:04 bit 6) is not set.
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