LPC Interface Bridge Registers (D31:F0)
452 Datasheet
13.1.11 SS—Sub System Identifiers Register (LPC I/F—D31:F0)
Offset Address: 2Ch–2Fh Attribute: R/WO
Default Value: 00000000h Size: 32 bits
This register is initialized to logic 0 by the assertion of PLTRST#. This register can be
written only once after PLTRST# deassertion.
13.1.12 PMBASE—ACPI Base Address Register (LPC I/F—D31:F0)
Offset Address: 40h–43h Attribute: R/W, RO
Default Value: 00000001h Size: 32 bit
Lockable: No Usage: ACPI, Legacy
Power Well: Core
Sets base address for ACPI I/O registers, GPIO registers and TCO I/O registers. These
registers can be mapped anywhere in the 64-K I/O space on 128-byte boundaries.
Bit Description
31:16
Subsystem ID (SSID) — R/WO. This is written by BIOS. No hardware action taken on
this value.
15:0
Subsystem Vendor ID (SSVID) — R/WO. This is written by BIOS. No hardware
action taken on this value.
Bit Description
31:16 Reserved
15:7
Base Address — R/W. This field provides 128 bytes of I/O space for ACPI, GPIO, and
TCO logic. This is placed on a 128-byte boundary.
6:1 Reserved
0 Resource Type Indicator (RTE) — RO. Hardwired to 1 to indicate I/O space.
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