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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 458

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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LPC Interface Bridge Registers (D31:F0)
458 Datasheet
13.1.20 LPC_HnBDF – HPET n Bus:Device:Function
(LPC I/F—D31:F0)
Address Offset H0BDF 70h–71h
H1BDF 72h–73h
H2BDF 74h–75h
H3BDF 76h–77h
H4BDF 78h–79h
H5BDF 7Ah–7Bh
H6BDF 7Ch–7Dh
H7BDF 7Eh–7Fh Attribute: R/W
Default Value: 00F8h Size: 16 bit
Bit Description
15:0
HPET n Bus:Device:Function (HnBDF)— R/W. This field specifies the
bus:device:function that the PCH’s HPET n will be using in the following:
As the Requester ID when initiating Interrupt Messages to the processor
As the Completer ID when responding to the reads targeting the corresponding
HPET’s Memory-Mapped I/O registers
The 16-bit field comprises the following:
This field is default to Bus 0: Device 31: Function 0 after reset. BIOS shall program this
field accordingly if unique bus:device:function number is required for the
corresponding HPET.
Bits Description
15:8 Bus Number
7:3 Device Number
2:0 Function Number

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