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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 470

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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LPC Interface Bridge Registers (D31:F0)
470 Datasheet
13.1.33 FDCAP—Feature Detection Capability ID
(LPC I/F—D31:F0)
Offset Address: E0h–E1h Attribute: RO
Default Value: 0009h Size: 16 bit
Power Well: Core
13.1.34 FDLEN—Feature Detection Capability Length
(LPC I/F—D31:F0)
Offset Address: E2h Attribute: RO
Default Value: 0Ch Size: 8 bit
Power Well: Core
13.1.35 FDVER—Feature Detection Version
(LPC I/F—D31:F0)
Offset Address: E3h Attribute: RO
Default Value: 10h Size: 8 bit
Power Well: Core
Bit Description
15:8
Next Item Pointer (NEXT) — RO. Configuration offset of the next Capability Item.
00h indicates the last item in the Capability List.
7:0 Capability ID — RO. Indicates a Vendor Specific Capability
Bit Description
7:0
Capability Length — RO. Indicates the length of this Vendor Specific capability, as
required by PCI Specification.
Bit Description
7:4
Vendor-Specific Capability ID — RO. A value of 1h in this 4-bit field identifies this
Capability as Feature Detection Type. This field allows software to differentiate the
Feature Detection Capability from other Vendor-Specific capabilities
3:0
Capability Version — RO. This field indicates the version of the Feature Detection
capability

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