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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 654

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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EHCI Controller Registers (D29:F0, D26:F0)
654 Datasheet
16.1.27 LEG_EXT_CAP—USB EHCI Legacy Support Extended
Capability Register (USB EHCI—D29:F0, D26:F0)
Address Offset: 686Bh Attribute: R/W, RO
Default Value: 00000001h Size: 32 bits
Power Well: Suspend
Function Level Reset: No
Note: These bits are not reset by a D3-to-D0 warm rest or a core well reset.
Bit Description
31:25 Reserved — RO. Hardwired to 00h
24
HC OS Owned Semaphore — R/W. System software sets this bit to request ownership
of the EHCI controller. Ownership is obtained when this bit reads as 1 and the HC BIOS
Owned Semaphore bit reads as clear.
23:17 Reserved — RO. Hardwired to 00h
16
HC BIOS Owned Semaphore — R/W. The BIOS sets this bit to establish ownership of
the EHCI controller. System BIOS will clear this bit in response to a request for
ownership of the EHCI controller by system software.
15:8
Next EHCI Capability Pointer — RO. Hardwired to 00h to indicate that there are no
EHCI Extended Capability structures in this device.
7:0
Capability ID — RO. Hardwired to 01h to indicate that this EHCI Extended Capability is
the Legacy Support Capability.

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