EHCI Controller Registers (D29:F0, D26:F0)
660 Datasheet
16.1.35 FLR_CTRL—Function Level Reset Control Register
(USB EHCI—D29:F0, D26:F0)
Address Offset: 9Ch Attribute: R/W
Default Value: 00h Size: 8 bits
Function Level Reset: No
16.1.36 FLR_STS—Function Level Reset Status Register
(USB EHCI—D29:F0, D26:F0)
Address Offset: 9Dh Attribute: RO
Default Value: 00h Size: 8 bits
Function Level Reset: No
Bit Description
7:1 Reserved
0
Initiate FLR — R/W. This bit is used to initiate FLR transition. A write of 1 initiates FLR
transition. Since hardware must not respond to any cycles until FLR completion, the
value read by software from this bit is always 0.
Bit Description
7:1 Reserved
0
Transactions Pending (TXP) — RO.
0 = Completions for all non-posted requests have been received.
1 = Controller has issued non-posted requests which have no bee completed.
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