Integrated Intel
®
High Definition Audio Controller Registers
690 Datasheet
17.1.1.14 SVID—Subsystem Vendor Identification Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 2Ch–2Dh Attribute: R/WO
Default Value: 0000h Size: 16 bits
Function Level Reset: No
The SVID register, in combination with the Subsystem ID register (D27:F0:2Eh),
enable the operating environment to distinguish one audio subsystem from the
other(s).
This register is implemented as write-once register. Once a value is written to it, the
value can be read back. Any subsequent writes will have no effect.
This register is not affected by the D3
HOT
to D0 transition.
17.1.1.15 SID—Subsystem Identification Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 2Eh–2Fh Attribute: R/WO
Default Value: 0000h Size: 16 bits
Function Level Reset: No
The SID register, in combination with the Subsystem Vendor ID register (D27:F0:2Ch)
make it possible for the operating environment to distinguish one audio subsystem
from the other(s).
This register is implemented as write-once register. Once a value is written to it, the
value can be read back. Any subsequent writes will have no effect.
This register is not affected by the D3
HOT
to D0 transition.
T
17.1.1.16 CAPPTR—Capabilities Pointer Register
(Intel
®
High Definition Audio Controller—D27:F0)
Address Offset: 34h Attribute: RO
Default Value: 50h Size: 8 bits
This register indicates the offset for the capability pointer.
Bit Description
15:0 Subsystem Vendor ID — R/WO.
Bit Description
15:0 Subsystem ID — R/WO.
Bit Description
7:0
Capabilities Pointer (CAP_PTR) — RO. This field indicates that the first capability
pointer offset is offset 50h (Power Management Capability).
To Next Page
Loading...
Need help?
General
