Intel 6 SERIES CHIPSET - DATASHEET 01-2011

Datasheet 79
Signal Description
DDPD_[3:0]P O
Port D: Capable of HDMI / DVI / DP
HDMI / DVI Port D Data and Clock Lines
DDPD_[0]P: TMDSC_DATA2
DDPD_[1]P: TMDSC_DATA1
DDPD_[2]P: TMDSC_DATA0
DDPD_[3]P: TMDSC_CLK
DisplayPort Port D
DDPD_[0]P: Display Port Lane 0
DDPD_[1]P: Display Port Lane 1
DDPD_[2]P: Display Port Lane 2
DDPD_[3]P: Display Port Lane 3
DDPD_[3:0]N O
Port D: Capable of HDMI / DVI / DisplayPort
HDMI / DVI Port D Data and Clock Line Complements
DDPD_[0]N: TMDSC_DATA2B
DDPD_[1]N: TMDSC_DATA1B
DDPD_[2]N: TMDSC_DATA0B
DDPD_[3]N: TMDSC_CLKB
DisplayPort Port D Complements
DDPD_[0]N: Lane 0 complement
DDPD_[1]N: Lane 1 complement
DDPD_[2]N: Lane 2 complement
DDPD_[3]N: Lane 3 complement
DDPD_AUXP I/O Port D: DisplayPort Aux
DDPD_AUXN I/O Port D: DisplayPort Aux Complement
DDPD_HPD I Port D: TMDSD_HPD Hot Plug Detect
DDPD_CTRLCLK I/O HDMI Port D Control Clock
DDPD_CTRLDATA I/O HDMI Port D Control Data
Table 2-23. Digital Display Interface Signals (Sheet 3 of 3)
Name Type Description