Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 903

Datasheet 903
Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.6 IDE BAR0
Table 23-5. IDE BAR0 Register Address Map
Address
Offset
Register
Symbol
Register Name
Default
Value
Attribute
0h IDEDATA IDE Data Register 00h R/W
1h IDEERD1 IDE Error Register DEV1 00h R/W
1h IDEERD0 IDE Error Register DEV0 00h R/W
1h IDEFR IDE Features Register 00h R/W
2h IDESCIR IDE Sector Count In Register 00h R/W
2h IDESCOR1 IDE Sector Count Out Register Device 1 00h R/W
2h IDESCOR0 IDE Sector Count Out Register Device 0 00h R/W
3h IDESNOR0 IDE Sector Number Out Register Device 0 00h R/W
3h IDESNOR1 IDE Sector Number Out Register Device 1 00h R/W
3h IDESNIR IDE Sector Number In Register 00h R/W
4h IDECLIR IDE Cylinder Low In Register 00h R/W
4h IDCLOR1 IDE Cylinder Low Out Register Device 1 00h R/W
4h IDCLOR0 IDE Cylinder Low Out Register Device 0 00h R/W
5h IDCHOR0 IDE Cylinder High Out Register Device 0 00h R/W
5h IDCHOR1 IDE Cylinder High Out Register Device 1 00h R/W
5h IDECHIR IDE Cylinder High In Register 00h R/W
6h IDEDHIR IDE Drive/Head In Register 00h R/W
6h IDDHOR1 IDE Drive Head Out Register Device 1 00h R/W
6h IDDHOR0 IDE Drive Head Out Register Device 0 00h R/W
7h IDESD0R IDE Status Device 0 Register 80h R/W
7h IDESD1R IDE Status Device 1 Register 80h R/W
7h IDECR IDE Command Register 00h R/W