Rev. 1.50, 10/04, page 89 of 448
Pre-Execution User Break/Post-Execution User Break:
• Source: Fulfilling of a break condition set in the user break controller
• Transition address: VBR + H'00000100, or DBR
• Transition operations:
In the case of a post-execution break, the PC contents for the instruction following the
instruction at which the breakpoint is set are set in SPC. In the case of a pre-execution break,
the PC contents for the instruction at which the breakpoint is set are set in SPC.
The SR and R15 contents when the break occurred are saved in SSR and SGR. Exception code
H'1E0 is set in EXPEVT.
The BL, MD, and RB bits are set to 1 in SR, and a branch is made to PC = VBR + H'0100. It is
also possible to branch to PC = DBR.
For details of PC, etc., when a data break is set, see the User Break Controller (UBC) section
of the hardware manual of the target product.
User_break_exception()
{
SPC = (pre_execution break? PC : PC + 2);
SSR = SR;
SGR = R15;
EXPEVT = H'0000 01E0;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
PC = (BRCR.UBDE==1 ? DBR : VBR + H′0000 0100);
}
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