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Renesas SuperH SH-4A User Manual

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 315 of 448
10.1.66 SHLLn (n bits Shift Logical Left): Shift Instruction
Format Operation Instruction Code Cycle T Bit
SHLL2 Rn Rn<<2 → Rn 0100nnnn00001000 1 —
SHLL8 Rn Rn<<8 → Rn 0100nnnn00011000 1 —
SHLL16 Rn Rn<<16 → Rn 0100nnnn00101000 1 —
Description: This instruction logically shifts the contents of general register Rn 2, 8, or 16 bits to
the left, and stores the result in Rn. The bits shifted out of the operand are discarded.
MSB LSB
0
SHLL8
SHLL16
MSB LSB
0
MSB LSB
0
SHLL2
Notes: None

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Renesas SuperH SH-4A Specifications

General IconGeneral
BrandRenesas
ModelSuperH SH-4A
CategoryComputer Hardware
LanguageEnglish

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