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Renesas SuperH SH-4A - DMULS.L (Double-Length Multiply as Signed): Arithmetic Instruction

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 235 of 448
10.1.18 DMULS.L (Double-length Multiply as Signed): Arithmetic Instruction
Format Operation Instruction Code Cycle T Bit
DMULS.L Rm,Rn Signed,
Rn × Rm MAC
0011nnnnmmmm1101 2 —
Description: This instruction performs 32-bit multiplication of the contents of general register Rn
by the contents of Rm, and stores the 64-bit result in the MACH and MACL registers. The
multiplication is performed as a signed arithmetic operation.
Notes: None
Operation:
DMULS(long m, long n) /* DMULS.L Rm,Rn */
{
unsigned long RnL,RnH,RmL,RmH,Res0,Res1,Res2;
unsigned long temp0,temp1,temp2,temp3;
long tempm,tempn,fnLmL;
tempn = (long)R[n];
tempm = (long)R[m];
if (tempn<0) tempn = 0 - tempn;
if (tempm<0) tempm = 0 - tempm;
if ((long)(R[n]^R[m])<0) fnLmL = -1;
else fnLmL = 0;
temp1 = (unsigned long)tempn;
temp2 = (unsigned long)tempm;
RnL = temp1&0x0000FFFF;
RnH = (temp1>>16)&0x0000FFFF;
RmL = temp2&0x0000FFFF;
RmH = (temp2>>16)&0x0000FFFF;

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