Renesas SuperH SH-4A User Manual

Rev. 1.50, 10/04, page 435 of 448
D. Version Registers (PVR, PRR)
The SH-4A has the read-only registers which show the version of a processor core, and the version
of a product. By using the value of these registers, it becomes possible to be able to distinguish the
version and product of a processor from software, and to realize the scalability of the high system.
Since the values of the version registers differ for every product, please refer to the hardware
manual or contact Renesas Technology Corp..
Note: The bit 7 to bit 0 of PVR register and the bit 3 to bit 0 of PRR register should be masked
by the software.
Table D.1 Register Configuration
Register Name Abbr. R/W P4 Address Area 7 Address Size
Processor version register PVR R H'FF000030 H'1F000030 32
Product register PRR R H'FF000044 H'1F000044 32
Processor Version Register (PVR):
RRRRRRR
R
R
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
**
*
*
****




RRRRRRRRR
R
RRRR
R
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
16
00
0
1
0000
*
*******
RRR RR R

R



CHIP VER
CUT
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 24 CHIP H'10 R Processor Family
The read value is always H'10 in the SH-4A.
23 to 16 VER
*
R Major Version
This value is changed when performing major
enhancement of the architecture. The version of this
manual is H'20.
15 to 8 CUT
*
R Minor Version
This value is changed when performing minor
enhancement of the architecture. It differs from one
product to another.
7 to 0 — Undefined R This value is undefined. It should be masked by
software when using it.
Note: * This value depends on a product.

Renesas SuperH SH-4A Specifications

General

Brand	Renesas
Model	SuperH SH-4A
Category	Computer Hardware
Language	English