Rev. 1.50, 10/04, page 201 of 448
Section 10 Instruction Descriptions
This section describes instructions in alphabetical order using the format shown below.
Instruction Name (Full Name): Instruction Type (Indication of delayed branch instruction
or interrupt-disabling instruction)
Format
Operation
Instruction Code
Cycle
T Bit
Assembler input format;
imm and disp are numbers,
expressions, or symbols
A brief description
of operation
Displayed in order
MSB < LSB
Number of
cycles when
there is no
wait state
The value of
T bit after the
instruction is
executed
Description:
Notes:
Operation:
Examples:
Description of operation
Notes on using the instruction
Operation written in C language
Location counter setting
Word integer data allocation
Longword integer data allocation
String data allocation
2-byte boundary alignment
4-byte boundary alignment
32-byte boundary alignment
16-times repeat expansion
32-times repeat expansion
Count-specification repeat expansion end
Possible Exceptions:
A list of exceptions that may occur when an instruction is executed is shown bellow.
But "Instruction TLB multiple-hit exception", "Instruction TLB miss exception", "Instruction TLB protection
exception", and "Instruction address error" are omitted because these exceptions may occur in all
instructions. As for the overflow/underflow exceptions, the detailed occurrence conditions are also described.
An example is shown using assembler mnemonics, indicating the states before and after execution
of the instruction.
Italics (e.g., .align) indicate an assembler control instruction. The meaning of the assembler control
instructions is given below. For details, refer to the C/C++ Compiler, Assembler, Optimizing linkage
editor User's Manual.
.org
.data.w
.data.1
.sdata
.align 2
.align 4
.align 32
.arepeat 16
.arepeat 32
.aendr
Note: SH Series cross-assembler version 1.0 does not support conditional assembler function
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