Rev. 1.50, 10/04, page vi of xx
Preface
The SH-4A is a RISC (Reduced Instruction Set Computer) microcomputer which includes a
Renesas Technology-original RISC CPU as its core.
Target Users: This manual was written for users who will be using the SH-4A in the design of
application systems. Users of this manual are expected to understand the
fundamentals of electrical circuits, logical circuits, microcomputers, and assembly/C
languages programming.
Objective: This manual was written to understand the instructions of the SH4A. For the
hardware functions, refer to corresponding hardware manual.
Notes on reading this manual:
• In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, and instructions.
• In order to understand the instructions
The instruction format and basic operation are explained in section 3, Instruction Set. For
details on each instruction operation, read section 10, Instruction Descriptions.
Rules: Register name: The following notation is used for cases when the same or a
similar function, e.g. serial communication, is implemented
on more than one channel:
XXX_N (XXX is the register name and N is the channel
number)
Bit order: The MSB is on the left and the LSB is on the right.
Number notation: Binary is B'xxxx, hexadecimal is H'xxxx, decimal is xxxx.
Signal notation: An overbar is added to a low-active signal: xxxx
Related Manuals: The latest versions of all related manuals are available from our web site.
Please ensure you have the latest versions of all documents you require.
http://www.renesas.com/
To Next Page
Loading...
Need help?
General
