Renesas SuperH SH-4A - FNEG (Floating-Point Negate Value): Floating-Point Instruction

Rev. 1.50, 10/04, page 405 of 448
10.3.16 FNEG (Floating-point Negate Value): Floating-Point Instruction
PR Format Operation Instruction Code Cycle T Bit
0 FNEG FRn FRn ^ H'80000000 → FRn 1111nnnn01001101 1 —
1 FNEG DRn DRn ^ H'8000000000000000
→ DRn
1111nnn001001101 1 —
Description: This instruction inverts the most significant bit (sign bit) of the contents of floating-
point register FRn/DRn, and stores the result in FRn/DRn.
The cause and flag fields in FPSCR are not updated.
Notes: None
Operation:
void FNEG (int n){
FR[n] = -FR[n];
pc += 2;
}
/* Same operation is performed regardless of precision. */
Possible Exceptions: None