Renesas SuperH SH-4A - 32-Bit Address Extended Mode; Figure 7.15 Memory-Mapped UTLB Data Array; Figure 7.16 Physical Address Space (32-Bit Address Extended Mode)

Rev. 1.50, 10/04, page 151 of 448
Address field
Data field
PPN:
V:
E:
SZ:
D:
*:
Physical page number
Validity bit
Entry
Page size bits
Dirty bit
Don't care
PR:
C:
SH:
WT:
:
Protection key data
Cacheability bit
Share status bit
Write-through bit
Reserved bits
(write value should be 0
and read value is undefined )
31 21
21
0
V
1098729 28 4 365
PR
CPPN D
SZ1
SH
WT
31 0
1111011
10000 00E
1920 8
714 13
******
** ****
Figure 7.15 Memory-Mapped UTLB Data Array
7.7 32-Bit Address Extended Mode
Setting the SE bit in PASCR to 1 changes mode from 29-bit address mode which handles the 29-
bit physical address space to 32-bit address extended mode which handles the 32-bit physical
address space.
P1 (0.5 Gbyte)
P1/P2
(1 Gbyte)
0.5 Gbyte
4 Gbytes
U0/P0
(2 Gbytes)
U0/P0
(2 Gbytes)
P2 (0.5 Gbyte)
P3 (0.5 Gbyte) P3 (0.5 Gbyte)
P4 (0.5 Gbyte)
P4 (0.5 Gbyte)
Virtual address space
29-bits
address space
Virtual address space
32-bit
address space
29-bit Physical address space
(Normal mode)
32-bit Physical address space
(Extended mode)
Figure 7.16 Physical Address Space (32-Bit Address Extended Mode)