Renesas SuperH SH-4A - XTRCT (Extract): Data Transfer Instruction

Rev. 1.50, 10/04, page 341 of 448
10.1.81 XTRCT (Extract): Data Transfer Instruction
Format Operation Instruction Code Cycle T Bit
XTRCT Rm,Rn Middle 32 bits of Rm:Rn → Rn 0010nnnnmmmm1101 1 —
Description: This instruction extracts the middle 32 bits from the 64-bit contents of linked general
registers Rm and Rn, and stores the result in Rn.
MSB
RnRm
Rn
LSBMSB LSB
Notes: None
Operation:
XTRCT(long m, long n) /* XTRCT Rm,Rn */
{
unsigned long temp;
temp = (R[m]<<16) & 0xFFFF0000;
R[n] = (R[n]>>16) & 0x0000FFFF;
R[n] |= temp;
PC += 2;
}
Example:
XTRCT R0,R1 ;Before execution R0 = H'01234567, R1 = H'89ABCDEF
;After execution R1 = H'456789AB