Rev. 1.50, 10/04, page 292 of 448
10.1.49 OCBWB (Operand Cache Block Write Back): Data Transfer Instruction
Format Operation Instruction Code Cycle T Bit
OCBWB @Rn Writes back operand cache
block
0000nnnn10110011 1 —
Description: This instruction accesses data using the contents indicated by effective address Rn.
If the cache is hit and there is unwritten information (U bit = 1), the corresponding cache block is
written back to external memory and that block is cleaned (the U bit is cleared to 0). In other cases
(i.e. in the case of a cache miss or an access to a non-cache area, or if the block is already clean),
no operation is performed.
Notes: None
Operation:
OCBWB(int n) /* OCBWB @Rn */
{
if(is_dirty_block(R[n])) write_back(R[n]);
PC += 2;
}
Possible Exceptions:
• Data TLB multiple-hit exception
• Data TLB miss exception
• Data TLB protection violation exception
• Data address error
Note that the above exceptions are generated even if OCBWB does not operate.
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