Rev. 1.50, 10/04, page 423 of 448
10.3.26 FTRV (Floating-point Transform Vector): Floating-Point Instruction
PR Format Operation Instruction Code Cycle T Bit
0 FTRV XMTRX,FVn transform_vector
(XMTRX, FVn) → FVn
1111nn0111111101 4 —
1 — — — — —
Description: When FPSCR.PR = 0: This instruction takes the contents of floating-point registers
XF0 to XF15 indicated by XMTRX as a 4-row × 4-column matrix, takes the contents of floating-
point registers FR[n] to FR[n + 3] indicated by FVn as a 4-dimensional vector, multiplies the array
by the vector, and stores the results in FV[n].
XMTRX FVn FVn
XF[0] XF[4] XF[8] XF[12] FR[n] FR[n]
XF[1] XF[5] XF[9] XF[13] × FR[n+1] → FR[n+1]
XF[2] XF[6] XF[10] XF[14] FR[n+2] FR[n+2]
XF[3] XF[7] XF[11] XF[15] FR[n+3] FR[n+3]
The FTRV instruction is intended for speed rather than accuracy, and therefore the results will
differ from those obtained by using a combination of FADD and FMUL instructions. The FTRV
execution sequence is as follows:
1. Multiplies all terms. The results are 28 bits long.
2. Aligns these results, rounding them to fit within 30 bits.
3. Adds the aligned values.
4. Performs normalization and rounding.
Special processing is performed in the following cases:
1. If an input value is an sNaN, an invalid exception is generated.
2. If the input values to be multiplied include a combination of 0 and infinity, an invalid
operation exception is generated.
3. In cases other than the above, if the input values include a qNaN, the result will be a qNaN.
4. In cases other than the above, if the input values include infinity:
a. If multiplication results in two or more infinities and the signs are different, an invalid
exception will be generated.
b. Otherwise, correct infinities will be stored.
5. If the input values do not include an sNaN, qNaN, or infinity, processing is performed in the
normal way.
To Next Page
Loading...
Need help?
General
