Renesas SuperH SH-4A

Rev. 1.50, 10/04, page 424 of 448
When FPSCR.enable.V/O/U/I is set, an FPU exception trap is generated regardless of whether or
not an exception has occurred. When an exception occurs, correct exception information is
reflected in FPSCR.cause and FPSCR.flag, and FVn is not updated. Appropriate processing
should therefore be performed by software.
Notes: None
Operation:
void FTRV (int n) /* FTRV FVn */
{
float saved_vec[4],result_vec[4];
int saved_fpscr;
int dst,i;
if(FPSCR_PR == 0) {
PC += 2;
clear_cause();
saved_fpscr = FPSCR;
FPSCR &= ~ENABLE_VOUI; /* mask VOUI enable */
dst = 12 - n; /* select other vector than FVn */
for(i=0;i<4;i++)saved_vec [i] = FR[dst+i];
for(i=0;i<4;i++){
for(j=0;j<4;j++) FR[dst+j] = XF[i+4j];
fipr(n,dst);
saved_fpscr |= FPSCR & (CAUSE|FLAG) ;
result_vec [i] = FR[dst+3];
}
for(i=0;i<4;i++)FR[dst+i] = saved_vec [i];
FPSCR = saved_fpscr;
if(FPSCR & ENABLE_VOUI) fpu_exception_trap();
else for(i=0;i<4;i++) FR[n+i] = result_vec [i];
}
else undefined_operation();
}