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Renesas SuperH SH-4A User Manual

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 376 of 448
10.3.5 FCNVSD (Floating-point Convert Single to Double Precision): Floating-Point
Instruction
PR Format Operation Instruction Code Cycle T Bit
0 — — — — —
1 FCNVSD FPUL,DRn (double) FPUL → DRn 1111nnn01010110
1
1 —
Description: When FPSCR.PR = 1: This instruction converts the single-precision floating-point
number in FPUL to a double-precision floating-point number, and stores the result in DRn.
Notes: None
Operation:
void FCNVSD(int n, float *FPUL){
pc += 2;
clear_cause();
case((FPSCR_PR){
0: undefined_operation(); /* reserved */
1: fcnvsd (n, *FPUL); break; /* FCNVSD */
}
}
void fcnvsd(int n, float *FPUL)
{
case(fpul_type(*FPUL)){
PZERO :
NZERO :
PINF :
NINF : DR[n>>1] = *FPUL; break;
DENORM : set_E(); break;
qNaN : qnan(n); break;
sNaN : invalid(n); break;
}
}
int fpul_type(int *FPUL)
{
int abs;

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Renesas SuperH SH-4A Specifications

General IconGeneral
BrandRenesas
ModelSuperH SH-4A
CategoryComputer Hardware
LanguageEnglish

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