Renesas SuperH SH-4A - ADD (Add Binary): Arithmetic Instruction

Rev. 1.50, 10/04, page 204 of 448
10.1.1 ADD (Add binary): Arithmetic Instruction
Format Operation Instruction Code Cycle T Bit
ADD Rm,Rn Rn + Rm → Rn 0011nnnnmmmm1100 1 —
ADD #imm,Rn Rn + imm → Rn 0111nnnniiiiiiii 1 —
Description: This instruction adds together the contents of general registers Rn and Rm and stores
the result in Rn.
8-bit immediate data can also be added to the contents of general register Rn.
8-bit immediate data is sign-extended to 32 bits, allowing use in decrement operations.
Notes: None
Operation:
ADD(long m, long n) /* ADD Rm,Rn */
{
R[n] += R[m];
PC += 2;
}
ADDI(long i, long n) /* ADD #imm,Rn */
{
if ((i&0x80)==0)
R[n] += (0x000000FF & (long)i);
else R[n] += (0xFFFFFF00 | (long)i);
PC += 2;
}
Example:
ADD R0,R1 ;Before execution R0 = H'7FFFFFFF, R1 = H'00000001
;After execution R1 = H'80000000
ADD #H'01,R2 ;Before execution R2 = H'00000000
;After execution R2 = H'00000001
ADD #H'FE,R3 ;Before execution R3 = H'00000001
;After execution R3 = H'FFFFFFFF