Renesas SuperH SH-4A

Rev. 1.50, 10/04, page 269 of 448
10.1.32 MOV (Move Global Data): Data Transfer Instruction
Format Operation Instruction Code Cycle T Bit
MOV.B @(disp*,GBR),R0 (disp + GBR)
→ sign extension → R0
11000100dddddddd 1 —
MOV.W @(disp*,GBR),R0 (disp × 2 + GBR)
→ sign extension → R0
11000101dddddddd 1 —
MOV.L @(disp*,GBR),R0 (disp × 4 + GBR) → R0 11000110dddddddd 1 —
MOV.B R0,@(disp*,GBR) R0 → (disp + GBR) 11000000dddddddd 1 —
MOV.W R0,@(disp*,GBR) R0 → (disp × 2 + GBR) 11000001dddddddd 1 —
MOV.L R0,@(disp*,GBR) R0 → (disp × 4 + GBR) 11000010dddddddd 1 —
Note: * The assembler of Renesas Technology uses the value after scaling (×1, ×2, or ×4) as
the displacement (disp).
Description: This instruction transfers the source operand to the destination. Byte, word, or
longword can be specified as the data size, but the register is always R0. If the transfer data is
byte-size, the 8-bit displacement is only zero-extended, so a range up to +255 bytes can be
specified. If the transfer data is word-size, the 8-bit displacement is multiplied by two after zero-
extension, enabling a range up to +510 bytes to be specified. With longword transfer data, the 8-
bit displacement is multiplied by four after zero-extension, enabling a range up to +1020 bytes to
be specified.
When the source operand is memory, the loaded data is sign-extended to longword before being
stored in the register.
Notes: When loading, the destination register is always R0.
Operation:
MOVBLG(int d) /* MOV.B @(disp,GBR),R0 */
{
unsigned int disp;
disp = (unsigned int)(0x000000FF & d);
R[0] = (int)Read_Byte(GBR+disp);
if ((R[0]&0x80)==0) R[0] &= 0x000000FF;
else R[0] |= 0xFFFFFF00;
PC += 2;
}