Renesas SuperH SH-4A User Manual

Rev. 1.50, 10/04, page 191 of 448
Bit Bit Name
Initial
Value
R/W Description
5 to 0 L0SSZ Undefined R/W L Memory Page 0 Block Transfer Source Address
Select
When MMUCR.AT = 0 or RAMCR.RP = 0, these bits
select whether the operand addresses or L0SADR
values are used as bits 15 to 10 of the transfer source
physical address for block transfer to the L memory.
L0SSZ[5:0] correspond to the transfer source physical
addresses [15:10].
0: The operand address is used as the transfer source
physical address.
1: The L0SADR value is used as the transfer source
physical address.
Settable values:
111111: Transfer source physical address is specified
in 1-Kbyte units.
111110: Transfer source physical address is specified
in 2-Kbyte units.
111100: Transfer source physical address is specified
in 4-Kbyte units.
111000: Transfer source physical address is specified
in 8-Kbyte units.
110000: Transfer source physical address is specified
in 16-Kbyte units.
100000: Transfer source physical address is specified
in 32-Kbyte units.
000000: Transfer source physical address is specified
in 64-Kbyte units.
Settings other than the ones given above are
prohibited.
9.2.3 L Memory Transfer Source Address Register 1 (LSA1)
When MMUCR.AT = 0 or RAMCR.RP = 0, the LSA1 specifies the transfer source physical
address for block transfer to page 1 in the L memory.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Bit :
000
Initial value :
R R R R/W R/W R/W R/W R/W R/W R/W
L1SADR
L1SADR L1SSZ
R/W R/W R/W R/W R/W R/W
R/W:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
Bit :
00
0
0
Initial value :
R/W R/W R/W R/W R/W R/W R R R R R/W R/W R/W R/W R/W R/W
R/W:

Renesas SuperH SH-4A Specifications

General

Brand	Renesas
Model	SuperH SH-4A
Category	Computer Hardware
Language	English