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Renesas SuperH SH-4A User Manual

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 266 of 448
10.1.31 MOV (Move Constant Value): Data Transfer Instruction
Format Operation Instruction Code Cycle T Bit
MOV #imm,Rn imm → sign extension
→ Rn
1110nnnniiiiiiii 1 —
MOV.W @(disp*,PC),Rn (disp × 2 + PC + 4)
→ sign extension → Rn
1001nnnndddddddd 1 —
MOV.L @(disp*,PC),Rn (disp × 4 + PC &
H'FFFFFFFC + 4)
→ Rn
1101nnnndddddddd 1 —
Note: * The assembler of Renesas Technology uses the value after scaling (×1, ×2, or ×4) as
the displacement (disp).
Description: This instruction stores immediate data, sign-extended to longword, in general
register Rn. In the case of word or longword data, the data is stored from memory address (PC + 4
+ displacement × 2) or (PC + 4 + displacement × 4).
With word data, the 8-bit displacement is multiplied by two after zero-extension, and so the
relative distance from the table is in the range up to PC + 4 + 510 bytes. The PC value is the
address of this instruction.
With longword data, the 8-bit displacement is multiplied by four after zero-extension, and so the
relative distance from the operand is in the range up to PC + 4 + 1020 bytes. The PC value is the
address of this instruction. A value with the lower 2 bits adjusted to B'00 is used in address
calculation.
Notes: If a PC-relative load instruction is executed in a delay slot, a slot illegal instruction
exception will be generated.

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Renesas SuperH SH-4A Specifications

General IconGeneral
BrandRenesas
ModelSuperH SH-4A
CategoryComputer Hardware
LanguageEnglish

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