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Renesas SuperH SH-4A User Manual

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 314 of 448
10.1.65 SHLL (Shift Logical Left ): Shift Instruction
Format Operation Instruction Code Cycle T Bit
SHLL Rn T Rn 0 0100nnnn00000000 1 MSB
Description: This instruction logically shifts the contents of general register Rn one bit to the left,
and stores the result in Rn. The bit shifted out of the operand is transferred to the T bit.
MSB LSB
0
SHLL
T
Notes: None
Operation:
SHLL(long n) /* SHLL Rn (Same as SHAL) */
{
if ((R[n]&0x80000000)==0) T = 0;
else T = 1;
R[n] <<= 1;
PC += 2;
}
Example:
SHLL R0 ;Before execution R0 = H'80000001, T = 0
;After execution R0 = H'00000002, T = 1

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Renesas SuperH SH-4A Specifications

General IconGeneral
BrandRenesas
ModelSuperH SH-4A
CategoryComputer Hardware
LanguageEnglish

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