Renesas SuperH SH-4A - DT (Decrement and Test): Arithmetic Instruction

Rev. 1.50, 10/04, page 239 of 448
10.1.20 DT (Decrement and Test): Arithmetic Instruction
Format Operation Instruction Code Cycle T Bit
DT Rn Rn – 1 → Rn;
if Rn = 0, 1 → T
if Rn ≠ 0, 0 → T
0100nnnn00010000 1 Result of
comparison
Description: This instruction decrements the contents of general register Rn by 1 and compares
the result with zero. If the result is zero, the T bit is set to 1. If the result is nonzero, the T bit is
cleared to 0.
Notes: None
Operation:
DT(long n)/* DT Rn */
{
R[n]--;
if (R[n]==0) T = 1;
else T = 0;
PC += 2;
}
Example:
MOV #4,R5 ;Set loop count
LOOP:
ADD R0,R1 ;
DT R5 ;Decrement R5 value and check for 0.
BF LOOP ;If T = 0, branch to LOOP (in this example, 4 loops are executed).