Renesas SuperH SH-4A - ADDC (Add with Carry): Arithmetic Instruction

Rev. 1.50, 10/04, page 205 of 448
10.1.2 ADDC (Add with Carry): Arithmetic Instruction
Format Operation Instruction Code Cycle T Bit
ADDC Rm,Rn Rn + Rm + T → Rn,
carry → T
0011nnnnmmmm1110 1 Carry
Description: This instruction adds together the contents of general registers Rn and Rm and the T
bit, and stores the result in Rn. A carry resulting from the operation is reflected in the T bit. This
instruction is used for additions exceeding 32 bits.
Notes: None
Operation:
ADDC(long m, long n) /* ADDC Rm,Rn */
{
unsigned long tmp0,tmp1;
tmp1 = R[n] + R[m];
tmp0 = R[n];
R[n] = tmp1 + T;
if (tmp0>tmp1) T = 1;
else T = 0;
if (tmp1>R[n]) T = 1;
PC += 2;
}
Example:
CLRT ;R0:R1(64 bits) + R2:R3(64 bits) = R0:R1(64 bits)
ADDC R3,R1 ;Before execution T = 0, R1 = H'00000001, R3 = H'FFFFFFFF
;After execution T = 1, R1 = H'00000000
ADDC R2,R0 ;Before execution T = 1, R0 = H'00000000, R2 = H'00000000
;After execution T = 0, R0 = H'00000001