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Renesas SuperH SH-4A User Manual

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 279 of 448
10.1.37 MOVLI (Move Linked): Data Transfer Instruction
Format Operation Instruction Code Cycle T Bit
MOVLI.L @Rm,R0 1 → LDST
(Rm) → R0
If an interrupt or exception
has occurred
0 → LDST
0000nnnn01100011 1 —
Description: MOVLI is used in combination with MOVCO to realize an atomic read-modify-
write operation in a single processor.
This instruction sets the LDST flag to 1 and reads the four bytes of data indicated by Rm into R0.
If, however, an interrupt or exception occurs, LDST is cleared to 0.
Storage by the MOVCO instruction only proceeds when the instruction is executed after the LDST
bit has been set by the MOVLI instruction and not cleared by an interrupt or other exception.
When LDST has been cleared to 0, the MOVCO instruction clears the T bit and does not proceed
with storage.
Notes: None
Operation:
MOVLINK(long m) /* MOVLI Rm,@Rn */
{
LDST = 1;
R[0] = Read_Long(R[m]);
PC += 2
}
Example:
See the examples for the MOVCO instruction.
Possible Exceptions:
• Data TLB multiple-hit exception
• Data TLB miss exception
• Data TLB protection violation exception
• Data address error

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Renesas SuperH SH-4A Specifications

General IconGeneral
BrandRenesas
ModelSuperH SH-4A
CategoryComputer Hardware
LanguageEnglish

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