Renesas SuperH SH-4A User Manual

Rev. 1.50, 10/04, page 70 of 448
5.4 Exception Types and Priorities
Table 5.3 shows the types of exceptions, with their relative priorities, vector addresses, and
exception/interrupt codes.
Table 5.3 Exceptions
Exception Transition
Direction*
3
Exception
Category
Execution
Mode Exception
Priority
Level*
2
Priority
Order*
2
Vector
Address Offset
Exception
Code*
4
Power-on reset 1 1 H'A000 0000 — H'000
Manual reset 1 2 H'A000 0000 — H'020
H-UDI reset 1 1 H'A000 0000 — H'000
Instruction TLB multiple-hit
exception
1 3 H'A000 0000 — H'140
Reset Abort type
Data TLB multiple-hit exception 1 4 H'A000 0000 — H'140
User break before instruction
execution*
2 0 (VBR/DBR) H'100/— H'1E0
Instruction address error 2 1 (VBR) H'100 H'0E0
Instruction TLB miss exception 2 2 (VBR) H'400 H'040
Instruction TLB protection
violation exception
2 3 (VBR) H'100 H'0A0
General illegal instruction
exception
2 4 (VBR) H'100 H'180
Slot illegal instruction exception 2 4 (VBR) H'100 H'1A0
General FPU disable exception 2 4 (VBR) H'100 H'800
Slot FPU disable exception 2 4 (VBR) H'100 H'820
Data address error (read) 2 5 (VBR) H'100 H'0E0
Data address error (write) 2 5 (VBR) H'100 H'100
Data TLB miss exception (read) 2 6 (VBR) H'400 H'040
Data TLB miss exception (write) 2 6 (VBR) H'400 H'060
Data TLB protection
violation exception (read)
2 7 (VBR) H'100 H'0A0
Data TLB protection
violation exception (write)
2 7 (VBR) H'100 H'0C0
FPU exception 2 8 (VBR) H'100 H'120
Re-
execution
type
Initial page write exception 2 9 (VBR) H'100 H'080
Unconditional trap (TRAPA) 2 4 (VBR) H'100 H'160
General
exception
Completion
type
User break after instruction
execution*
2 10 (VBR/DBR) H'100/— H'1E0

Renesas SuperH SH-4A Specifications

General

Brand	Renesas
Model	SuperH SH-4A
Category	Computer Hardware
Language	English