Renesas SuperH SH-4A - MULU.W (Multiply as Unsigned Word): Arithmetic Instruction

Rev. 1.50, 10/04, page 285 of 448
10.1.42 MULU.W (Multiply as Unsigned Word): Arithmetic Instruction
Format Operation Instruction Code Cycle T Bit
MULU.W Rm,Rn Unsigned, Rn × Rm →
MACL
0010nnnnmmmm1110 1 —
Description: This instruction performs 16-bit multiplication of the contents of general registers
Rn and Rm, and stores the 32-bit result in the MACL register. The multiplication is performed as
an unsigned arithmetic operation. The contents of MACH are not changed.
Notes: None
Operation:
MULU(long m, long n) /* MULU Rm,Rn */
{
MACL = ((unsigned long)(unsigned short)R[n]*
(unsigned long)(unsigned short)R[m];
PC += 2;
}
Example:
MULU.W R0,R1 ;Before execution R0 = H'00000002, R1 = H'FFFFAAAA
;After execution MACL = H'00015554
STS MACL,R0 ;Get operation result