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Renesas SuperH SH-4A - Graphics Support Functions; Geometric Operation Instructions

Renesas SuperH SH-4A
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Rev. 1.50, 10/04, page 111 of 448
6.6 Graphics Support Functions
The SH-4A supports two kinds of graphics functions: new instructions for geometric operations,
and pair single-precision transfer instructions that enable high-speed data transfer.
6.6.1 Geometric Operation Instructions
Geometric operation instructions perform approximate-value computations. To enable high-speed
computation with a minimum of hardware, the SH-4A ignores comparatively small values in the
partial computation results of four multiplications. Consequently, the error shown below is
produced in the result of the computation:
Maximum error = MAX (individual multiplication result ×
2
–MIN (number of multiplier significant digits–1, number of multiplicand significant digits–1)
) + MAX (result value × 2
–23
, 2
–149
)
The number of significant digits is 24 for a normalized number and 23 for a denormalized number
(number of leading zeros in the fractional part).
In a future version of the SH Series, the above error is guaranteed, but the same result between
different processor cores is not guaranteed.
FIPR FVm, FVn (m, n: 0, 4, 8, 12): This instruction is basically used for the following purposes:
Inner product (m n):
This operation is generally used for surface/rear surface determination for polygon surfaces.
Sum of square of elements (m = n):
This operation is generally used to find the length of a vector.
Since an inexact exception is not detected by an FIPR instruction, the inexact exception (I) bit in
both the FPU exception cause field and flag field are always set to 1 when an FIPR instruction is
executed. Therefore, if the I bit is set in the FPU exception enable field, FPU exception handling
will be executed.
FTRV XMTRX, FVn (n: 0, 4, 8, 12): This instruction is basically used for the following
purposes:
Matrix (4 × 4) vector (4):
This operation is generally used for viewpoint changes, angle changes, or movements called
vector transformations (4-dimensional). Since affine transformation processing for angle +
parallel movement basically requires a 4 × 4 matrix, the SH-4A supports 4-dimensional
operations.
Matrix (4 × 4) × matrix (4 × 4):
This operation requires the execution of four FTRV instructions.

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