EasyManua.ls Logo

Renesas SuperH SH-4A - FPU Instruction

Renesas SuperH SH-4A
472 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Rev. 1.50, 10/04, page 354 of 448
10.3 FPU Instruction
The following resources and functions are for use in C-language descriptions of the operation of
FPU instructions and supplement the resources and functions used in describing the operation of
CPU instructions.
These are floating-point number definition statements.
#define PZERO 0
#define NZERO 1
#define DENORM 2
#define NORM 3
#define PINF 4
#define NINF 5
#define qNaN 6
#define sNaN 7
#define EQ 0
#define GT 1
#define LT 2
#define UO 3
#define INVALID 4
#define FADD 0
#define FSUB 1
#define CAUSE 0x0003f000 /* FPSCR(bit17-12) */
#define SET_E 0x00020000 /* FPSCR(bit17) */
#define SET_V 0x00010040 /* FPSCR(bit16,6) */
#define SET_Z 0x00008020 /* FPSCR(bit15,5) */
#define SET_O 0x00004010 /* FPSCR(bit14,4) */
#define SET_U 0x00002008 /* FPSCR(bit13,3) */
#define SET_I 0x00001004 /* FPSCR(bit12,2) */
#define ENABLE_VOUI 0x00000b80 /* FPSCR(bit11,9-7) */
#define ENABLE_V 0x00000800 /* FPSCR(bit11) */
#define ENABLE_Z 0x00000400 /* FPSCR(bit10) */
#define ENABLE_OUI 0x00000380 /* FPSCR(bit9-7) */
#define ENABLE_I 0x00000080 /* FPSCR(bit7) */
#define FLAG 0x0000007C /* FPSCR(bit6-2) */

Table of Contents

Related product manuals