Rev. 1.50, 10/04, page 272 of 448
10.1.33 MOV (Move Structure Data): Data Transfer Instruction
Format Operation Instruction Code Cycle T Bit
MOV.B R0,@(disp*,Rn) R0 → (disp + Rn) 10000000nnnndddd 1 —
MOV.W R0,@(disp*,Rn) R0 → (disp × 2 + Rn) 10000001nnnndddd 1 —
MOV.L Rm,@(disp*,Rn) Rm → (disp × 4 + Rn) 0001nnnnmmmmdddd 1 —
MOV.B @(disp*,Rm),R0 (disp + Rm) →
sign extension → R0
10000100mmmmdddd 1 —
MOV.W @(disp*,Rm),R0 (disp × 2 + Rm) →
sign extension → R0
10000101mmmmdddd 1 —
MOV.L @(disp*,Rm),Rn (disp × 4 + Rm) → Rn 0101nnnnmmmmdddd 1 —
Note: * The assembler of Renesas Technology uses the value after scaling (×1, ×2, or ×4) as
the displacement (disp).
Description: This instruction transfers the source operand to the destination. It is ideal for
accessing data inside a structure or stack. Byte, word, or longword can be specified as the data
size, but with byte or word data the register is always R0.
If the data is byte-size, the 4-bit displacement is only zero-extended, so a range up to +15 bytes
can be specified. If the data is word-size, the 4-bit displacement is multiplied by two after zero-
extension, enabling a range up to +30 bytes to be specified. With longword data, the 4-bit
displacement is multiplied by four after zero-extension, enabling a range up to +60 bytes to be
specified. If a memory operand cannot be reached, the previously described @(R0,Rn) mode must
be used.
When the source operand is memory, the loaded data is sign-extended to longword before being
stored in the register.
Notes: When loading byte or word data, the destination register is always R0. Therefore, if the
following instruction attempts to reference R0, it is kept waiting until completion of the load
instruction. This allows optimization by changing the order of instructions.
MOV.B
AND
ADD
@(2,R1),R0
#80,R0
#20,R1
MOV.B
ADD
AND
@(2,R1),R0
#20,R1
#80,R0
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