Renesas SuperH SH-4A - SUBV (Subtract with (V Flag) Underflow Check): Arithmetic Instruction

Rev. 1.50, 10/04, page 329 of 448
10.1.74 SUBV (Subtract with (V flag) Underflow Check): Arithmetic Instruction
Format Operation Instruction Code Cycle T Bit
SUBV Rm,Rn Rn - Rm → Rn, underflow
→ T
0011nnnnmmmm1011 1 Underflow
Description: This instruction subtracts the contents of general register Rm from the contents of
general register Rn, and stores the result in Rn. If underflow occurs, the T bit is set.
Notes: None
Operation:
SUBV(long m, long n) /* SUBV Rm,Rn */
{
long dest,src,ans;
if ((long)R[n]>=0) dest = 0;
else dest = 1;
if ((long)R[m]>=0) src = 0;
else src = 1;
src += dest;
R[n] -= R[m];
if ((long)R[n]>=0) ans = 0;
else ans = 1;
ans += dest;
if (src==1) {
if (ans==1) T = 1;
else T = 0;
}
else T = 0;
PC += 2;
}