Rev. 1.50, 10/04, page 346 of 448
10.2.3 JSR (Jump to Subroutine): Branch Instruction (Delayed Branch Instruction)
Format Operation Instruction Code Cycle T Bit
JSR @Rn PC+4 → PR, Rn → PC 0100nnnn00001011 1 —
Description: This instruction makes a delayed branch to the subroutine procedure at the specified
address after execution of the following instruction. Return address (PC + 4) is saved in PR, and a
branch is made to the address indicated by general register Rn. JSR is used in combination with
RTS for subroutine procedure calls.
Notes: As this is a delayed branch instruction, the instruction following this instruction is executed
before the branch destination instruction.
Interrupts are not accepted between this instruction and the following instruction. If the following
instruction is a branch instruction, it is identified as a slot illegal instruction.
Operation:
JSR(int n)/* JSR @Rn */
{
unsigned int temp;
temp = PC;
PR = PC + 4;
PC = R[n];
Delay_Slot(temp+2);
}
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