Renesas SuperH SH-4A User Manual

Rev. 1.50, 10/04, page 224 of 448
10.1.14 CMP/cond (Compare Conditionally): Arithmetic Instruction
Format Operation Instruction Code Cycle T Bit
CMP/EQ Rm,Rn If Rn = Rm, 1 → T
Otherwise, 0 → T
0011nnnnmmmm0000 1 Result of
comparison
CMP/GE Rm,Rn If Rn ≥ Rm, signed, 1 → T
Otherwise, 0 → T
0011nnnnmmmm0011 1 Result of
comparison
CMP/GT Rm,Rn If Rn > Rm, signed, 1 → T
Otherwise, 0 → T
0011nnnnmmmm0111 1 Result of
comparison
CMP/HI Rm,Rn If Rn > Rm, unsigned, 1 → T
Otherwise, 0 → T
0011nnnnmmmm0110 1 Result of
comparison
CMP/HS Rm,Rn If Rn ≥ Rm, unsigned, 1 → T
Otherwise, 0 → T
0011nnnnmmmm0010 1 Result of
comparison
CMP/PL Rn If Rn > 0, 1 → T
Otherwise, 0 → T
0100nnnn00010101 1 Result of
comparison
CMP/PZ Rn If Rn ≥ 0, 1 → T
Otherwise, 0 → T
0100nnnn00010001 1 Result of
comparison
CMP/STR Rm,Rn If any bytes are equal, 1 → T
Otherwise, 0 → T
0010nnnnmmmm1100 1 Result of
comparison
CMP/EQ #imm,R0 If R0 = imm, 1 → T
Otherwise, 0 → T
10001000iiiiiiii 1 Result of
comparison
Description: This instruction compares general registers Rn and Rm, and sets the T bit if the
specified condition (cond) is true. If the condition is false, the T bit is cleared. The contents of Rn
are not changed. Nine conditions can be specified. For the two conditions PZ and PL, Rn is
compared with 0.
With the EQ condition, sign-extended 8-bit immediate data can be compared with R0. The
contents of R0 are not changed.

Renesas SuperH SH-4A Specifications

General

Brand	Renesas
Model	SuperH SH-4A
Category	Computer Hardware
Language	English