Renesas SuperH SH-4A

Rev. 1.50, 10/04, page 416 of 448
10.3.23 FSTS (Floating-point Store System Register): Floating-Point Instruction
Format Operation Instruction Code Cycle T Bit
FSTS FPUL,FRn FPUL → FRn 1111nnnn00001101 1 —
Description: This instruction transfers the contents of system register FPUL to floating-point
register FRn.
Notes: None
Operation:
void FSTS(int n, float *FPUL)
{
FR[n] = *FPUL;
pc += 2;
}
Possible Exceptions: None