Renesas SuperH SH-4A

Rev. 1.50, 10/04, page 221 of 448
10.1.11 CLRMAC (Clear MAC Register): System Control Instruction
Format Operation Instruction Code Cycle T Bit
CLRMAC 0 → MACH, MACL 0000000000101000 1 —
Description: This instruction clears the MACH and MACL registers.
Notes: None
Operation:
CLRMAC( ) /* CLRMAC */
{
MACH = 0;
MACL = 0;
PC += 2;
}
Example:
CLRMAC ;Clear MAC register to initialize.
MAC.W @R0+,@R1+ ;Multiply-and-accumulate operation
MAC.W @R0+,@R1+ ;