Rev. 1.50, 10/04, page 193 of 448
9.2.4 L Memory Transfer Destination Address Register 0 (LDA0)
When MMUCR.AT = 0 or RAMCR.RP = 0, LDA0 specifies the transfer destination physical
address for block transfer to page 0 of the L memory.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Bit :
000
Initial value :
R R R R/W R/W R/W R/W R/W R/W R/W
L0DADR
L0DADR L0DSZ
R/W R/W R/W R/W R/W R/W
R/W:
151413121110987654321
0
Bit :
00
0
0
Initial value :
R/WR/WR/WR/WR/WR/WRRRRR/WR/WR/WR/WR/WR/W
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 29 — All 0 R Reserved
For read/write in these bits, refer to General
Precautions on Handling of Product.
28 to 10 L0DADR Undefined R/W L Memory Page 0 Block Transfer Destination Address
When MMUCR.AT = 0 or RAMCR.RP = 0, these bits
specify transfer destination physical address for block
transfer to page 0 in the L memory.
9 to 6 — All 0 R Reserved
For read/write in these bits, refer to General
Precautions on Handling of Product.
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